IPR-NIOS Altera, IPR-NIOS Datasheet - Page 167

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 7: Application Binary Interface
Stacks
Stacks
December 2010 Altera Corporation
Table 7–2. Nios II ABI Register Usage (Part 2 of 2)
The endianness of values greater than 8 bits is little endian. The upper 8 bits of a value
are stored at the higher byte address.
The stack grows downward (i.e. towards lower addresses). The stack pointer points to
the last used slot. The frame pointer points to the saved frame pointer near the top of
the stack frame.
r25
r26
r27
r28
r29
r30
r31
Notes to
(1) A function can use one of these registers if it saves it first. The function must restore the register’s original value
(2) In the GNU Linux operating system, r22 points to the global offset table (GOT). Otherwise, it is available as a
(3) In the GNU Linux operating system, r23 is used as the thread pointer. Otherwise, it is available as a callee-saved
(4) If the frame pointer is not used, the register is available as a callee-saved temporary register. Refer to
Register
before exiting.
callee-saved general-purpose register.
general-purpose register.
Pointer Elimination” on page
Table
bt
gp
sp
fp
ea
ba
ra
Name
7–2:
Compiler
Used by
v
v
v
v
7–4.
Saved
Callee
(4)
(1)
Break temporary
Global pointer
Stack pointer
Frame pointer
Exception return address
■
■
Return address
Normal register set: Break return address
Shadow register sets: SSTATUS register
Normal Usage
Nios II Processor Reference Handbook
“Frame
7–3