tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 72

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Note: The above system diagram does not represent the address/data bus function.
3.5.2
Port 1 (P10-P17)
or output. The control register P1CR and function register P1FC are used to set the port for input or
output. A reset clears all bits of output latch P1 and all bits of P1CR and P1FC to 0, putting port 1 in
input mode.
address/data bus (AD8-AD15) or an address bus (A8-A15). To access external memory, set this port to
an address bus or address/data bus using P1CR and P1FC.
Port 1 is an 8-bit general-purpose input/output port whose bits can each be set independently for input
In addition to functioning as a general-purpose input/output port, this port can also function as an
Direction Control
Function Control
Write to P1CR
Write to P1FC
Output Latch
Write to P1
(bitwise)
(bitwise)
Reset
Figure 0.3 Port 1 (P10-P17)
TMP1942CY/CZ-71
Read P1
Output Buffer
TMP1942CY/CZ
STOP
DRIVE
Port 1
P10-P17
(AD8-AD15/A8-A15)