tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 242
tmp19a43fzxbg
Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
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Note: Since division by N+(16-K)/16 is disabled, the value set in BR0ADD<BR0K3:BR0K0> is
ignored.
•
(BR0CR<BR0S3:BR0S0>) set to 10 and BR0CR<BR0ADDE> set to 0 after fc = 24.576 MHz
has been specified as fperiph and φT0 has been set to fperiph/4, then the baud rate in UART
mode is calculated as follows:
•
(BR0CR<BR0S3:BR0S0>) set to 7, K (BR0ADD<BR0K3:BR0K0>) set to 3 and
BR0CR<BR0ADDE> set to 1 after fc = 19.2 MHz has been specified as fperiph and φT0 has
been set to fperiph/4, the baud rate is calculated as follows:
serial clock. In this case the baud rate is calculated as follows:
* Clock conditions
* Clock conditions
If φT2 is chosen as the input clock to the baud rate generator with the divisor N
If φT2 is chosen as the input clock to the baud rate generator with the divisor N
Tables 3.11.2 and 3.11.3 show example baud rates in UART mode.
Instead of a prescaler output, a clock input from an external source can also be used as the
Baud rate =
= 24.576 × 10
Baud rate =
= 19.2 × 10
When dividing the input clock by an integer (N)
When dividing the input clock by N+(16-K)/16 (UART mode only)
• UART mode
• I/O interface mode
Baud rate = external clock input/16
However, the period of the external clock must be greater than or equal to 4/fsys.
Baud Rate = external clock input
However, the period of the external clock must be greater than or equal to 16/fsys.
6
fc
7
÷ 16 ÷ (7 +
6
10
+
fc
/
÷ 16 ÷ 10 ÷ 16 = 9600 (bps)
16
16
System clock
High-speed clock gear : × 1 (fc)
Prescaler clock
System clock
High-speed clock gear : × 1 (fc)
Prescaler clock
/
TMP1942CY/CZ-241
16
16
3 -
÷ 16
÷ 16
13
16
) ÷ 16 = 9600 (bps)
: High-speed (fc)
: fperiph/4 (fperiph = fsys)
: High-speed (fc)
: fperiph/4 (fperiph = fsys)
TMP1942CY/CZ
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