tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 196
tmp19a43fzxbg
Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A43FZXBG.pdf
(406 pages)
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3.10.2
Note 1: The prescaler’s output clock φTn must be selected such that the relationship φTn < fsys/2 is
Note 2: Do not change the clock gear value while the timer is running.
Note 3: The — character means “Don’t use”.
Clock Selection
Peripheral
<FPSEL>
0 (fgear)
1 (fc)
Function description of each circuit
(1) Prescaler
satisfied (i.e., φTn must be slower than fsys/2).
has a frequency of fperiph, fperiph/2, or fperiph/4 as selected by SYSCR0<PRCK1:PRCK0> in the
CG block.
before division by the clock gear.
the prescaler to start counting and writing 0 causes it to clear itself and stop counting. Table 3.10.5
shows the resolutions of the prescaler output clocks.
The TMP1942 has a 5-bit prescaler to supply a clock to TMRB0. The prescaler’s input clock φT0
Fperiph is either the clock fgear as selected by SYSCR1<FPSEL> in the CG block or the clock fc
The prescaler is set to either run or stop by TA01RUN<TA0PRUN>. Writing a 1 to this bit causes
Clock Gear Value
<GEAR1:0>
Table 3.10.5 Prescaler Output Clock Resolutions
01 (fc/2)
10 (fc/4)
11 (fc/8)
01 (fc/2)
10 (fc/4)
11 (fc/8)
00 (fc)
00 (fc)
TMP1942CY/CZ-195
Prescaler Clock
00 (fperiph/4)
01 (fperiph/2)
10 (fperip)
00 (fperiph/4)
01 (fperiph/2)
10 (fperip)
00 (fperiph/4)
01 (fperiph/2)
10 (fperip)
00 (fperiph/4)
01 (fperiph/2)
10 (fperip)
00 (fperiph/4)
01 (fperiph/2)
10 (fperip)
00 (fperiph/4)
01 (fperiph/2)
10 (fperip)
00 (fperiph/4)
01 (fperiph/2)
10 (fperip)
00 (fperiph/4)
01 (fperiph/2)
10 (fperip)
<PRCK1:0>
Selected
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
2
2
3
3
3
3
4
5
4
6
5
(0.125 μ s)
(0.125 μ s)
φT1
Prescaler Output Clock Resolution
(0.25 μ s)
(0.25 μ s)
(0.25 μ s)
(0.25 μ s)
(0.5 μ s)
(1.0 μ s)
(0.5 μ s)
(2.0 μ s)
(1.0 μ s)
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
3
3
3
5
4
6
5
4
7
6
5
8
7
6
5
4
5
4
5
4
5
φT4
(0.25 μ s)
(0.25 μ s)
(0.25 μ s)
(1.0 μ s)
(0.5 μ s)
(2.0 μ s)
(1.0 μ s)
(0.5 μ s)
(4.0 μ s)
(2.0 μ s)
(1.0 μ s)
(8.0 μ s)
(4.0 μ s)
(2.0 μ s)
(1.0 μ s)
(0.5 μ s)
(1.0 μ s)
(0.5 μ s)
(1.0 μ s)
(0.5 μ s)
(1.0 μ s)
⎯
⎯
⎯
TX1942CY/CZ
fc/25 (1.0 μ s)
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
@fc = 32 MHz
φT16
7
6
5
8
7
6
8
7
10
8
7
6
5
7
6
7
6
5
7
6
5
9
9
(4.0 μ s)
(2.0 μ s)
(1.0 μ s)
(8.0 μ s)
(4.0 μ s)
(2.0 μ s)
(8.0 μ s)
(4.0 μ s)
(8.0 μ s)
(4.0 μ s)
(2.0 μ s)
(1.0 μ s)
(4.0 μ s)
(2.0 μ s)
(4.0 μ s)
(2.0 μ s)
(1.0 μ s)
(4.0 μ s)
(2.0 μ s)
(1.0 μ s)
(16 μ s)
(16 μ s)
(32 μ s)
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