tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 185

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tmp19a43fzxbg

Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
TA0REG-WR
(3) 8-bit PPG (programmable square wave) output mode
Low-active or High-active output pulses can be selected.
PA6).
the 8-bit up-counter UC0 matches the timer registers TA0REG and TA1REG.
the up-counter UC1 of TMRA1 cannot be used in this mode, TA01RUN<TA1RUN> must be set to 1
to enable TMRA1 counting.
TA01RUN<TA0RDE>
A square wave of any frequency with any duty cycle can be output using TMRA0. Either
TMRA1 cannot be used in this mode. The square wave is forwarded to TA1OUT (shared with
This mode is used to output a programmable square wave by inverting the timer output every time
However, the condition (TA0REG set value) < (TA1REG set value) must be satisfied. Although
Figure 3.9.19 shows a block diagram of 8-bit PPG output mode.
TA01MOD<TA0CLK1:0>
match (generating INTTA0)
match (generating INTTA1)
TA0REG and up-counter 0
TA1REG and up-counter 0
φT16
φT1
φT4
Selector
Figure 3.9.19 8-Bit PPG Output Mode Block Diagram
Figure 3.9.18 8-Bit PPG Output Waveform
Selector
Shift trigger
Register buffer
TA1OUT
Comparator
TA0REG
TMP1942CY/CZ-184
8-bit up-counter
Internal data bus
(UC 0)
Comparator
TA1REG
t
H
TA01RUN<TA0RUN>
t
TA0REG
TA1REG
t
L
TA1OUT
TMP1942CY/CZ
TA1FF
Invert
TA1FFCR<TAFF1IE>
INTTA0
INTTA1

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