tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 158

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Note: The DMAC does not incremnt or decrement the address for I/O peripherals. Therefore, if, for
Table 3.8.2 Unit of Data Transfer and Device Port Size (Dual-Address Mode)
example, TrSiz is programmed to 16 bits and DPS is programmed to 8 bits, both the first and second
bus cycles access the lower eight bits of the I/O data bus.
device (the device port size) needs to be set (to 32 bits, 16 bits or 8 bits) using the DPS field in
the CCRn register, in addition to the unit of data transfer.
read or write operation for the I/O device.
multiple read or write operations for the I/O device. For example, when performing a transfer
to memory from an I/O device whose device port size is 8 bits when the unit of data transfer is
32 bits, the DMAC will read data from the I/O device and store it in the DHR register four
times, 8 bits at a time, and then write 32 bits of data from the DHR register to memory in one
operation (or in two operations if the external memory’s data bus is 16 bits wide).
The value of the BCRn register also changes by an amount equal to the unit of data transfer.
The device port size cannot be set to a value greater than the unit of data transfer. Table 3.8.2
summarizes the above information:
For memory-to-I/O device or I/O device-to-memory data transfers, the bus width of the I/O
If the unit of data transfer and the device port size are equal, the DMAC will perform one
If the device port size is smaller than the unit of data transfer, the DMAC will perform
The source and destination addresses change at intervals equal to the unit of data transfer.
0x (32 bits)
0x (32 bits)
0x (32 bits)
10 (16 bits)
10 (16 bits)
10 (16 bits)
11 (8 bits)
11 (8 bits)
11 (8 bits)
TrSiz
0x (32 bits)
10 (16 bits)
11 (8 bits)
0x (32 bits)
10 (16 bits)
11 (8 bits)
0x (32 bits)
10 (16 bits)
11 (8 bits)
TMP1942CY/CZ-157
DPS
Operations Performed
Number of Bus
Setting prohibited
Setting prohibited
Setting prohibited
on I/O Device
Four times
Twice
Twice
Once
Once
Once
TMP1942CY/CZ