tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 30

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Note 1: In Halt mode (entered when the Halt bit in the Config Register is set), the TX19 processor
Note 2: In Doze mode (entered when the Doze bit in the Config Register is set), the TX19 processor
2) SLEEP: Only the internal low-speed oscillator, timer for real-time clock, 2-phase pulse input counter,
3) STOP: The CPU runs with the low-speed clock. The INTC, timer for real-time clock, WDT, 2-phase
4) SLOW: All of the internal circuits stop.
core stops processor operation while maintaining the pipeline status. Since it does not
respond to requests for control of the bus from internal DMA, it retains control of the bus.
core stops processor operation while maintaining the pipeline status. In this mode, it can
respond to requests for control of the bus from devices external to the processor core.
pulse input counter, KWUP (dynamic pull-up), PIO, and EBIF can operate. Operation of other
peripheral functions is not guaranteed.
and KWUP (dynamic pull-up) operate.
Table 3.3.3 IDLE Mode Internal I/O Setup Registers
Internal I/O
A/D converter
TMRAAB
TMRA01
TMRA23
TMRA45
TMRA67
TMRA89
TMRBC
TMRBD
TMRBA
TMRBB
TMRB0
TMRB1
TMRB2
TMRB3
TMRB4
TMRB5
TMRB6
TMRB7
TMRB8
TMRB9
SIO0
SIO1
SIO3
SIO4
SIO5
WDT
SBI
TMP1942CY/CZ-29
IDLE Mode Setup Register
TAABRUN<I2TAAB>
TA01RUN<I2TA01>
TA23RUN<I2TA23>
TA45RUN<I2TA45>
TA67RUN<I2TA67>
TA89RUN<I2TA89>
SBI0BR1<I2SBI0>
WDMOD<I2WDT>
TBCRUN<I2TBC>
TBDRUN<I2TBD>
TBARUN<I2TBA>
TBBRUN<I2TBB>
SC0MOD1<I2S0>
SC1MOD1<I2S1>
SC3MOD1<I2S3>
SC3MOD1<I2S4>
SC4MOD1<I2S5>
TB0RUN<I2TB0>
TB1RUN<I2TB1>
TB2RUN<I2TB2>
TB3RUN<I2TB3>
TB4RUN<I2TB4>
TB5RUN<I2TB5>
TB6RUN<I2TB6>
TB7RUN<I2TB7>
TB8RUN<I2TB8>
TB9RUN<I2TB9>
ADMOD1<I2AD>
TMP1942CY/CZ