tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 206
tmp19a43fzxbg
Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A43FZXBG.pdf
(406 pages)
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TB2MOD
(0xFFFF_
F162)
TB3MOD
(0xFFFF_
F172)
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Must always be set to 00.
Must always be set to 00.
⎯
⎯
7
0
7
0
⎯
⎯
⎯
⎯
6
0
6
0
Figure 3.10.10 TMRB Registers
Software
capture
control
0: Software
1: Don’t care
Software
capture
control
0: Software
1: Don’t care
TB2CP0
TB3CP0
capture
capture
TMP1942CY/CZ-205
TMRB2 mode register
TMRB3 mode register
W *
W *
5
1
5
1
Capture timing
00: Disabled
01: TB2IN0 ↑ TB2IN1 ↑
10: TB2IN0 ↑ TB2IN0 ↓
11: TA3OUT ↑ TA3OUT ↓
Capture timing
00: Disabled
01: TB3IN0 ↑ TB3IN1 ↑
10: TB3IN0 ↑ TB3IN0 ↓
11: TA3OUT ↑ TA3OUT ↓
TB2CPM1 TB2CPM0
TB3CPM1 TB3CPM0
Clearing up-counter (UC0)
Capture timing
Software capture
Clearing up-counter (UC0)
Capture timing
Software capture
00
01
10
11
00
01
10
11
0
1
0
1
0
1
0
1
4
0
4
0
Clearing of up-counter disabled
Up-counter cleared when it matches TB2RG1
Capture disabled
Latches value into TB2CP0 at rise of TB2IN0.
Latches value into TB2CP1 at rise of TB2IN1.
Latches value into TB2CP0 at rise of TB2IN0.
Latches value into TB2CP1 at fall of TB2IN0.
Latches value into TB2CP0 at rise of TA3OUT.
Latches value into TB2CP1 at fall of TA3OUT.
Latches up-counter value into TB2CP0.
Don’t care
Clearing of up-counter disabled
Capture disabled
Latches value into TB3CP0 at rise of TB3IN0.
Latches value into TB3CP1 at rise of TB3IN1.
Latches value into TB3CP0 at rise of TB3IN0.
Latches value into TB3CP1 at fall of TB3IN0.
Latches value into TB3CP0 at rise of TA3OUT.
Latches value into TB3CP1 at fall of TA3OUT.
Latches up-counter value into TB3CP0.
Don’t care
Up-counter cleared when it matches TB3RG1
3
0
3
0
Up-counter
control
0: Clearing
1: Clearing
Up-counter
control
0: Clearing
1: Clearing
TB2CLE
Capture control
TB3CLE
Capture control
disabled
enabled
disabled
enabled
R/W
R/W
2
0
2
0
TX1942CY/CZ
11: φT16
11: φT16
Source clock selection
00: TB2IN0 pin input
01: φT1
10: φT4
Source clock selection
00: TB3IN0 pin input
01: φT1
10: φT4
TB2CLK1
TB3CLK1
1
0
1
0
TB2CLK0
TB3CLK0
0
0
0
0
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