tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 320

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

ADREG6EL
(0xFFFF_F30C)
ADREG6EH
(0xFFFF_F30D)
ADREG7FL
(0xFFFF_F30E)
ADREG7FH
(0xFFFF_F30F)
Note1: Bit 0 is the A/D conversion result store flag ADRxRF. This bit is set to 1 when an A/D converted
Note2: Bit 1 is the overrun flag OVRx. This bit is set to 1 when the next conversion result is written before
value is stored in the register pair. This bit is cleared to 0 when the lower register (ADREGxL) is read.
both conversion result registers (ADREGxH and ADREGxL) have been read. Reading the flag
clears the bit.
Converted value for channe
Bit symbol
Read/Write
After Reset
Function
Bit symbol
Read/Write
After Reset
Function
Bit symbol
Read/Write
After Reset
Function
Bit symbol
Read/Write
After Reset
Function
x
Stores lower 2 bits of A/D
conversion result
Stores lower 2 bits of A/D
conversion result
ADR61
ADR71
ADR69
ADR79
7
7
7
7
Undefined
Undefined
Figure 3.13.2 A/D Converter Registers (9/12)
A/D Conversion Result Lower Register 6E
A/D Conversion Result Upper Register 6E
A/D Conversion Result Lower Register 7F
A/D Conversion Result Upper Register 7F
R
R
ADREGxH
ADR60
ADR70
9
ADR68
ADR78
7
6
6
6
6
8
6
TMP1942CY/CZ-319
7
5
ADR67
ADR77
Stores upper 8 bits of A/D conversion result
Stores upper 8 bits of A/D conversion result
⎯
⎯
⎯
⎯
⎯
⎯
5
5
4
5
5
6
3
5
2
ADR66
ADR76
4
⎯
⎯
⎯
⎯
⎯
⎯
4
4
4
4
1
Undefined
Undefined
3
0
R
R
2
ADR65
ADR75
⎯
⎯
⎯
⎯
⎯
⎯
3
3
3
3
1
7
0
6
Bits 2 to 5 are always read as 1s.
ADR64
ADR74
5
⎯
⎯
⎯
⎯
⎯
⎯
TMP1942CY/CZ
2
2
2
2
4
Overrun flag
0: No overrun
1: Overrun
Overrun flag
0: No overrun
1: Overrun
3
occurred
occurred
occurred
occurred
ADR63
ADR73
OVR6
OVR7
2
1
R
1
R
0
1
0
1
ADREGxL
1
A/D conversion
result store flag
1: Conversion
A/D conversion
result store flag
1: Conversion
0
ADR6RF
ADR7RF
result stored
ADR62
result stored
ADR72
R
0
R
0
0
0
0
0