tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 182

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3.9.4
Functional description for each mode
TA01RUN
TA01MOD
TA1REG
IMC5LH
TA01RUN
Note: X = Don’t care; “—” = No change
Note: The input clocks for TMRA0 and TMRA1 differ as shown below.
(1) 8-bit timer mode
a. Generating interrupts periodically
stop TMRA0 and TMRA1 before attempting to set their functions or count data.
at certain intervals, first stop timer 1 and set the operating mode, input clock and cycle in the
TA01MOD and TA1REG registers. Ne×t, enable the INTTA1 interrupt and start timer 1.
E×ample: To generate INTTA1 interrupts every 20 μs with fc = 32 MHz, set the registers in
TMRA0 and TMRA1 can be used as 8-bit interval timers independently of each other. You must
The following description uses TMRA1 as an e×ample. To generate a TRAM1 interrupt, INTTA1,
For a description of input clock selection, refer to Table 3.9.3.
TMRA0: TA0IN pin input, φT1, φT4 or φT16
TMRA1: TMRA0 match detection signal, φT1, φT16 or φT256
←
← 0
← 0
← X
←
*Clock conditions
7
−
−
the following sequence:
MSB
6
−
0
1
X
X
5
X
X
0
1
X
4
X
X
1
1
X
3
−
1
0
0
−
LSB
2
−
0
0
1
1
TMP1942CY/CZ-181
System clock:
Prescaler clock:
1
0
X
0
0
1
0
−
X
0
1
−
Stop TMRA1 and clear it to 0.
Select 8-bit timer mode and set input clock to φT1
(0.25 μs resolution, fc = 32 MHz).
Write 20 μs/φT1 = 80 (50H) to TA1REG.
Enable INTTA1 and set interrupt level = 5 and rising edge
detection.
Start TMRA1.
High-speed (fc)
fperiph/4 (fperiph = fsys)
TMP1942CY/CZ