tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 156

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3.8.4.3
Address modes
are explicitly addressed..
the source device is temporarily stored in the DMAC’s internal register DHR. Next, the DMAC
executes a write to the destination device to write this data to the destination device, thus performing
a data transfer from the source to the destination device.
this bit must always be set to 0 because the TMP1942 only supports dual-address mode.
Address bus
The TMP1942 only supports dual-address mode in which both the source and destination devices
In dual-address mode the DMAC first executes a read from the source device. The data read from
Although bit 15 of the CCRn register in the TMP1942 can be used to specify the address mode,
Data bus
Figure 3.8.12 Diagram of Data Transfer in Dual-Address Mode
DMAC
TMP1942CY/CZ-155
Address
Data
(1)
(2)
(1)
(2)
Destination device
Source device
TMP1942CY/CZ