tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 268

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(0xFFFF_F283)
(0xFFFF_F284)
BR3ADD
BR3CR
Figure 3.11.28 Baud Rate Generator Control Registers (BR3CR and BR3ADD, for SIO3)
Note 1: The baud rate generator divisor cannot be set to 1 in UART mode if division by
Note 2: When using division by N+(16-K)/16, be sure to set K (1 to 15) in BR3ADD
Note 3: Division by N+(16-K)/16 can only be used in UART mode. In I/O interface mode, set
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
BR0ADD<BR0K3:0>
1111 (K = 15)
0001 (K = 1)
0000
N+(16-K)/16 is being used. It cannot be set to 1 at all in I/O interface mode.
<BR3K3:BR3K0> before setting BR3CR<BR3ADDE> to 1. However, if BR3CR
<BR3S3:BR3S0> = 0000 or 0001 (i.e. if N = 16 or 1), do not use division by N+(16-K)/16.
BR3CR<BR3ADDE> to 0 to disable division by N+(16-K)/16.
Must
always be
set to 0.
—
⎯
⎯
⎯
7
7
0
Sets divisor value for baud rate generator
Division by
N+(16-K)/16
0: Disable
1: Enable
BR3ADDE
0000 (N = 16)
0001 (N = 1)
BR0CR<BR0ADDE> = 1
Invalid
Invalid
⎯
⎯
⎯
6
6
0
TMP1942CY/CZ-267
00: φ T0
01: φ T2
10: φ T8
11: φ T32
00 Internal clock φ T0
01 Internal clock φ T2
10 Internal clock φ T8
11 Internal clock φ T32
BR3CK1
Selects baud rate generator input clock
⎯
⎯
⎯
5
0
5
1111 (N = 15)
0010 (N = 2)
Divided by N
+ (16-K)/16
Invalid
BR0CR<BR0S3:0>
BR3CK0
⎯
⎯
⎯
4
4
0
R/W
0001 (N = 1) (ONLY UART)
BR0CR<BR0ADDE> = 0
BR3S3
BR3K3
Sets K value for division by N+(16-K)/16
3
3
1111 (N = 15)
0000 (N = 16)
0
0
Divided by N
⎯
Sets value of divisor N
BR3S2
BR3K2
2
2
0
0
TMP1942CY/CZ
R/W
BR3S1
BR3K1
1
1
0
0
BR3S0
BR3K0
0
0
0
0