tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 282

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

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Master controller settings
Slave settings
Main routine
PDCR
PDFC
IMCCLL
IMCCLH
SC0MOD0
SC0BUF
Interrupt routine (INTTX0)
INTCLR
SC0MOD0
SC0BUF
End of interrupt processing
Main routine
PDCR
PDFC
ODE
IMCCLL
IMCCLH
SC0MOD0
Interrupt routine (INTRX0)
INTCLR
Reg.
if
Then
SC0MOD0
Reg. = selection code
← − − 1 1 0 1 0 1
← − − 1 1 0 1 0 0
← 1 0 1 0 1 1 1 0
← 0 0 0 0 0 0 0 1
← X X 1 1 0 0 0 1
← 0 − − − − − − −
← * * * * * * * *
← − − − − − − 0 1
← − − − − − − X 1
← X X − − − − − 1
← − − 1 1 0 1 1 0
← − − 1 1 0 1 0 1
← 0 0 1 1 1 1 1 0
← X X 1 1 0 0 0 0
← SC0BUF
← − − − 0 − − − −
← − − − − − − 0 1
← − − − − − − X 1
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
TMP1942CY/CZ-281
Set selection code for slave 1.
Set transmit data.
Set PD0 to TXD (open-drain output) and PD1 to RXD.
WU to 1.
Clear WU to 0.
Set PD0 to TXD0 and PD1 to RXD0.
Enable INTRX0 and set interrupt level to 5.
Enable INTTX0 and set interrupt level to 4.
Select 9-bit UART mode and set transfer clock to f
Clear interrupt request.
Set TB8 to 0.
Enable INTTX0 and INTRX0.
Select 9-bit UART mode and set transfer clock to f
Clear interrupt request.
TMP1942CY/CZ
sys/2
sys/2
.
and