tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 285

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

SBI0CR1
(0xFFFF_F240) Read/Write
Note 1: Clear SBI0CR1<BC2:BC0> to 000 before switching the device to clock-synchronous 8-bit SIO
Note 2: For details of the SCL line clock frequency, refer to Section 3.12.5 (3), “Serial clock”.
3.12.4
mode.
I
interface and to monitor its operating status:
Bit symbol
After Reset
Function
2
C Bus Mode Control Registers
When the serial bus interface is operated in I
Selects number of bits to be
transferred (Note 1)
BC2
7
0
Serial Bus Interface Control Register 1
Figure 3.12.2 I
BC1
W
6
0
TMP1942CY/CZ-284
BC0
2
5
0
C Bus Mode Registers
2
Ack clock
0: Do not
1: Generate
C bus mode, the following registers are used to control the
generate
Selects internal SCL output clock frequency <SCK2:SCK0>
(for write)
000
001
010
011
100
101
110
111
Software reset state monitor <SWRMON> (for read)
Selects number of bits to be transferred
<BC2:0
ACK
R/W
000
001
010
011
100
101
110
111
4
0
0
1
>
n=4
n=5
n=6
n=7
n=8
n=9
n=10
Software reset in progress
Software reset not in progress
clock cycles
Number of
400 kHz
222 kHz
118 kHz
60.6 kHz
30.8 kHz
15.5 kHz
7.78 kHz
reserved
⎯
8
1
2
3
4
5
6
7
3
<ACK> = 0
Selects internal SCL output clock
frequency (Note 2) and monitors
reset state
Data length
SCK2
TMP1942CY/CZ
2
0
8
1
2
3
4
5
6
7
System clock:: fc(=32 MHz)
Clock gear:
φ T0 = fperiph/4 (= 8 MHz)
Frequency =
W
clock cycles
Number of
SCK1
1
0
9
2
3
4
5
6
7
8
2n
: fc/1
<ACK> = 1
φ
T0
+
4
SWRMON
Data length
SCK0/
[ Hz ]
R/W
0
1
8
1
2
3
4
5
6
7