tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 312

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3.
AN7/ADTRG
AN15 (P67)
3.13 ANALOG/DIGITAL CONVERTER
AN0 (P50)
VREFH
VREFL
ANALOG/DIGITAL CONVERTER
input channels. In addition to normal conversion, the converter supports highest-priority conversion mode, in
input channels. In addition to normal conversion, the converter supports highest-priority conversion mode, in
which continuous conversion can be interrupted by conversion for a specific analog channel. The converter
which continuous conversion can be interrupted by conversion for a specific analog channel. The converter
also supports an A/D monitor function, which allows the device to compare the value in the specified
also supports an A/D monitor function, which allows the device to compare the value in the specified
conversion result register with the value set in the compare register to determine which is greater. This
conversion result register with the value set in the compare register to determine which is greater. This
function enables the device to monitor analog quantities without software intervention.
function enables the device to monitor analog quantities without software intervention.
(AN0-AN15) are also used as input-only port pins and/or key input pins.
(AN0-AN15) are also used as input-only port pins and/or key input pins.
Note:
Note:
The TMP1942 contains a 10-bit Half Flash analog/digital converter (A/D converter) with sixteen analog
The TMP1942 contains a 10-bit Half Flash analog/digital converter (A/D converter) with sixteen analog
Figure 3.13.1 shows a block diagram of the A/D converter. The pins for the sixteen analog input channels
Figure 3.13.1 shows a block diagram of the A/D converter. The pins for the sixteen analog input channels
When placing the device into IDLE, SLEEP or STOP mode to reduce the device's current consumption,
When placing the device into IDLE, SLEEP or STOP mode to reduce the device's current consumption,
check that the A/D converter has stopped operating before executing the instruction to enter a standby
check that the A/D converter has stopped operating before executing the instruction to enter a standby
mode. This is necessary because, with some timings, the internal comparator may remain enabled
mode. This is necessary because, with some timings, the internal comparator may remain enabled
while the device is in a standby mode. When placing the device into SLOW mode, stop the operation of
while the device is in a standby mode. When placing the device into SLOW mode, stop the operation of
the A/D converter beforehand.
the A/D converter beforehand.
Channel Selection
Internal Data Bus
ADMOD1
Controller
ADSCN
Figure 3.13.1 A/D Converter Block Diagram
Figure 3.13.1 A/D Converter Block Diagram
Sample and
Normal A/D Conversion
Hold
End
ADS
ADMOD0
Controller
TMP1942CY/CZ-311
Busy
Comparator
Scan
repeat
+
−
Interrupt
Interval
D/A Converter
Internal Data Bus
Conversion Termination
Highest-priority A/D
ADMOD2
End
Interrupt
ADREG07H to 8FH
ADREG07L to 8FL
Result Registers
A/D Conversion
A/D Conversion
Result Register
Busy
A/D monitor controller
ADMOD3
start
TMP1942CY/CZ
Highest-Priority A/D Conversion
Termination Interrupt
Interrupt Request INTAD
HPADCE
ADTRG
A/D Start Controller
A/D Monitor Interrupt
Internal Data Bus
ADMOD4
INTTA0/1