tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 398

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tmp19a43fzxbg

Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
7 I/O Port Equivalent-Circuit Diagrams
■ P0(D0 to D7 / AD0 to AD7), P1(D8 to D15 / AD8 to AD15, A8 to A15), P2(A16 to A23, A0 to A7),
■ P30(
■ P32 to P36, P40 to P43
How to read circuit diagrams
The circuit diagrams in this chapter are drawn using the same gate symbols as for the 74HCxx
Series standard CMOS logic ICs.
The signal named STOP has a unique function. This signal goes active-high if the CPU sets the
HALT bit when the STBY[1:0] field in the SYSCR2 register is programmed to 01 (i.e., STOP mode)
and the Drive Enable (FRVE) bit in the same register is cleared. If the DRVE bit is set, the STOP
signal remains inactive (at logic 0).
The input protection circuit has a resistor in the range of several tens to several hundreds of ohms.
P92 to P97, PA0 to PA6, PB0 to PB6, PC0 to PC5, PC7, PD0, PD1, PD4, PE1, PE4, PE6, PE7,
PF3, PF6
RD
), P31(
Output Enable
Output Enable
Output Data
WR
Output Data
Input data
STOP
Input Data
), DCLK, PCST3 to PCST0, SDAO / TPC, TDO
STOP
Output Data
STOP
TMP1942CY/CZ-397
Input Enable
Input Enable
VCC
Vcc
P-ch
N-ch
P-ch
N-ch
Vcc
TMP1942CY/CZ
Vcc
Input/Output
Programmable
Pull-up Resistor
Output
Input/Output

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