tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 187

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tmp19a43fzxbg

Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
TA0REG-WR
φT16
φT1
φT4
(4) 8-bit PWM output mode
TA01MOD <TA0CLK1 : 0>
up-counter 0 match
(INTTA0 interrupt)
output is forwarded to the TA1OUT pin (shared with PA6).
match. It is also inverted when a 2
TA01MOD<PWM01:PWM00>). The up-counter UC0 is cleared to 0 upon the occurrence of a 2
counter overflow.
This mode, only available for TMRA0, can output PWM pulses with up to 8-bit resolution. PWM
In this mode TMRA1 can be used as an 8-bit timer.
Timer output is inverted when the up-counter UC0 and the value set in the timer register TA0REG
Before PWM mode can be used, the following conditions must be satisfied:
(TA0REG set value) < (2
(TA0REG set value) ≠ 0
Figure 3.9.22 shows a block diagram of 8-bit PWM output mode.
TA01RUN<TA0RDE>
TA0REG and
2
n
Selector
-1 overflow
TA1OUT
Selector
Figure 3.9.22 8-Bit PWM Output Mode Block Diagram
Figure 3.9.21 8-Bit PWM Output Waveform
Shift trigger
Internal data bus
8-bit up-counter
Register buffer
Comparator
TA0REG
n
(UC 0)
-1 counter overflow set value)
TMP1942CY/CZ-186
n
-1 counter overflow occurs (n = 6, 7 or 8 as specified in
TA01RUN <TA0RUN>
2
n
Clear
-1 overflow
control
Overflow
(PWM cycle)
<PWM01:00
t
PWM
TA01MOD
TMP1942CY/CZ
>
TA1OUT
TA1FF
Invert
<TAFF1IE>
TA1FFCR
INTTA0
n
-1

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