PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 93
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PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
Specifications of PNX1500E
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Volume 1 of 1
Table 5: Native Pixel Format Summary
PNX15XX_PNX952X_SER_N_4
Product data sheet
Name
1 bpp indexed
2 bpp indexed
4 bpp indexed
8 bpp indexed
RGBa 4444
RGBa 4534
RGB 565
RGBa 8888
packed YUVa 4:4:4
packed YUV 4:2:2 (UYVY)
packed YUV 4:2:2 (YUY2, 2vuy)
planar YUV 4:2:2
semi-planar YUV 4:2:2
planar YUV 4:2:0
semi-planar YUV 4:2:0
7.2 Video Input Processor
Remark: The native formats of PNX15xx/952x Series include the most common
indexed, packed RGB, packed YUV and planar YUV formats used by Microsoft
DirectX and Apple Quicktime, with 100% bit layout compatibility in little and big-endian
modes of operation, respectively.
Remark: TM3260 software image processing stages and encoders/decoders
typically use semi-planar or planar 4:2:0 or 4:2:2 formats as input and output.
The Video Input Processor (VIP) handles incoming digital video and processes it for
use by other components of the PNX15xx/952x Series. VIP provides 10-bit accurate
processing. The VIP provides the following functions:
1. VIP output of RGB is mutually exclusive with horizontal scaling
2. Shown are the 2D engine frame buffer formats where drawing, RasterOps and
•
•
Software (on the TM3260 CPU) can be written endian-mode independent, even
when doing SIMD style vectorized computations
alpha-blending of surfaces can be accelerated. Additionally, the 2D Drawing
Engine host port supports 1 bpp monochrome font/pattern data, and 4 and 8-bit
alpha only data for host-initiated anti-aliased drawing.
Receives 10-bit YUV4:2:2 like digital video format from the video port. The data is
dithered down to in-memory 8-bit data format. The YUV4:2:2 data stream
typically comes from devices such as the SAA 711x, which digitize PAL or NTSC
analog video. The input data can be other than YUV, like YCrCb as long as it
follows the YUV 4:2:2 video format.
Note
CLUT entry = 24-bit color + 8-bit alpha
16-bit unit, containing one pixel with alpha
16-bit unit, containing one pixel, no alpha
32-bit unit, containing one pixel with alpha
32-bit unit containing one pixel with alpha
16-bit unit, two successive units contain two
horizontally adjacent pixels, no alpha
three arrays, one for each component
two arrays, one with all Ys, one with U and Vs
three arrays, one for each component
two arrays, one with all Ys, one with U and Vs
Rev. 4.0 — 03 December 2007
PNX15xx/952x Series
VIP
out
(1)
(1)
(1)
(1)
x
x
x
x
x
MBS
in
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
MBS
out
x
x
x
x
x
x
x
x
x
x
x
Chapter 2: Overview
© NXP B.V. 2007. All rights reserved.
2D
engine
(2)
x
x
x
x
x
x
QVCP-
LCD
in
x
x
x
x
x
x
x
x
x
x
x
x
x
2-93
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