PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 92

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
6. MPEG Decoding
7. Image Processing
PNX15XX_PNX952X_SER_N_4
Product data sheet
6.1 VLD
6.2 DVD De-scrambler
7.1 Pixel Format
The TM3260 processes the audio, video and the stream de-multiplexing via software.
The Variable Length decoding as well as the authentication and the de-scrambling
are supported by two coprocessors.
The PNX15xx/952x Series VLD is an MPEG-1 and MPEG-2 parser that writes to
memory a separate data structure for macro block header and coefficient information.
It is capable of sustaining an ATSC (High Definition) bitrate. It off-loads the CPU in
applications involving MPEG-2 decoding or transcoding. Low to medium bitrate VLD
decoding, as well as VLC encoding may be done by the TM3260 CPU. MPEG-2 HD
decoding by the CPU is not supported due to CPU and system limitations.
The DVD-CSS module is provided to allow integrated DVD playback capability.
It provides authentication and de-scrambling for DVDs. A DVD drive can be attached
to the integrated medium-bandwidth IDE controller, and provides its data either
across the IDE interface or across a multi bit serial interface to the GPIO pins. The
resulting system memory scrambled program stream is de-scrambled by invoking a
memory to memory operation on the DVD-CSS module. The ‘cleartext’ program
stream is then de-multiplexed by software on the TM3260.
More detailed Information available on (legal) request
The on-chip hardware image processing modules all use the same ‘native’ pixel
formats, as shown in
can be read by another module.
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•
•
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A limited number of native pixel formats are supported by all image subsystems,
as appropriate.
The Memory Based Scaler supports conversion from arbitrary pixel formats to
any native format during the anti-flicker filtering operation. This operation is
usually required on graphics images anyway, hence no extra passes are
introduced.
Hardware subsystems support all native pixel formats in both little-endian and
big-endian system operation.
Software always sees the same component layout for a native pixel format unit,
whether it is running in little-endian or big-endian mode. i.e. for a given native
format, R, G, B (or Y,U,V) and alpha are always in the same place.
Rev. 4.0 — 03 December 2007
Table
5. This ensures that image data produced by one module
PNX15xx/952x Series
Chapter 2: Overview
© NXP B.V. 2007. All rights reserved.
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