PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 640
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PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
Specifications of PNX1500E
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Table 22: Destination Address, XY Coordinates
Table 23: BLT Size
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
Offset 0x04 F430
31:27
26:24
23:16
15:11
10:8
7:0
Bit
Offset 0x04 F434
31:28
27:16
15:12
11:0
Symbol
Reserved
Y[10:8]
Y[7:0]
Reserved
X[10:8]
X[7:0]
Symbol
Reserved
H
Reserved
W
Destination Address, XY Coordinates
BLT Size
The X and Y fields are unsigned 11 bit numbers allowing a 2K by 2K address space.
Since the drawing engine uses linear addresses internally, the X and Y coordinates in
this register will be converted to a linear address. It is byte accessible; a write to the
high byte of this register begins the conversion process from XY to linear. It is not
used for vectors.
Note that SrcLinear should be utilized when using monochrome bitmaps or text. The
lower six bits of SrcLinear specify the starting bit position within a
the SrcLinear register with the converted XY address.
This register is used to load the starting XY pixel destination coordinate for a drawing
operation.
The X and Y fields are unsigned 11-bit numbers allowing a 2K by 2K address space.
Since the drawing engine uses linear addresses internally, the X and Y coordinates in
this register will be converted to a linear address. It is byte accessible; a write to the
high byte of this register begins the conversion process from XY to linear.
This register causes the same behavior as writing to DstXY2, which is provided to
allow for command register bursting during vector commands.
Drawing commands that require patterns must use this register to specify the
destination coordinate. Using the DstLinear register to specify destination during a
pattern command will cause errant results.
Also loads the DstLinear register with the converted XY address.This register
specifies the height and width of a BLT operation in pixels/scanlines.
Acces
s
R/W
R/W
R/W
R/W
Acces
s
R/W
R/W
Value
0
0
0
0
Value
FFF
FFF
Rev. 4.0 — 03 December 2007
Description
Unsigned 11-bit Y destination address
Unsigned 11-bit X destination address
Description
Height of the BLT in scanlines
Width of the BLT in pixels
PNX15xx/952x Series
Chapter 20: 2D Drawing Engine
DWORD
© NXP B.V. 2007. All rights reserved.
. Also loads
20-640
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