PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 603

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
Table 8: Memory Based Scaler (MBS) Registers
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
31:29
28
27:26
25:20
19: 0
Offset 0x10 C244
31
30:28
27:26
25
24:21
20
19:14
13: 0
Offset 0x10 C248
31:26
25: 0
Offset 0x10 C24C
Symbol
VSP_PHASE_MODE[2:
0]
Reserved
VSP_FIR_COMP[1:0]
Reserved
VSP_ZOOM_0[19:0]
Reserved
VSP_QSHIFT[2:0]
Reserved
VSP_QSIGN
VSP_LDIFF_C[3:0]
Reserved
VSP_OFFSET_C[12:8]
VSP_OFFSET_0[12:0]
Reserved
VSP_DZOOM_0[25:0]
Phase Control
Initial Zoom delta
Zoom delta change
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
-
0
-
0
0
-
-
0
0
Value
Rev. 4.0 — 03 December 2007
…Continued
Description
Phase mode
Vertical filter components
1
Initial zoom for 1st pixel in line (unsigned, LSB = 2
Quantization shift control
Used to change quantization before being multiplied with 0.5.
Quantization sign bit
Initial start offset for chroma DTO
(Used for 4:2:0 scaling and de-interlacing only.)
Initial start offset for DTO
Initial zoom delta for 1 pixel in line (signed, LSB = 2
Used for non-constant scaling ratios.
Line offset for chroma line count (signed, needed for slicing only)
Filter lengths differ when in de-interlacing mode.
0: 64 phases
1: 32 phases
2: 16 phases
3: 8 phases
4: 4 phases
5: 2 phases
6: fixed phase
7: linear phase interpolation (only valid for4 component mode)
00: two components, 6 tap FIR each
01: reserved
10: three components, 4 tap FIR each
11: four components, 3 tap FIR each
2 0000 (hex): downscale 50%
1 0000 (hex): no scaling = 2
0 8000 (hex): zoom 2 x
100 (bin): divide by 16
101 (bin): divide by 8
110 (bin): divide by 4
111 (bin): divide by 2
000 (bin): multiply by 1
001 (bin): multiply by 2
010 (bin): multiply by 4
011 (bin): multiply by 8
Chapter 19: Memory Based Scaler
PNX15xx/952x Series
0
1
© NXP B.V. 2007. All rights reserved.
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