PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 16

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
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Chapter 12: Video Input Processor
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Chapter 13: FGPO: Fast General Purpose Output
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Chapter 14: FGPI: Fast General Purpose Interface
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Chapter 15: Audio Output
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Chapter 16: Audio Input
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Chapter 17: SPDIF Output
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PNX15XX_PNX952X_SER_N_4
Product data sheet
VBI/Programming Data Packet Formats
Shadow Mechanism
Shadowing of Registers
Resource Layer and ID
Simplified VIP Block Diagram
VIP Module Interface
Digital Video Input Port Timing Relationships
in HD Mode
Test Pattern
D1 Data Stream
HD Dual Data Stream
Video Data Flow
Top Level Block Diagram
FGPO Module Block Diagram
Back-to-back Message Passing Example
Top Level Block Diagram
FGPI Module Block Diagram
Input data width not equal to sample size set-
ting
Audio Out Block Diagram
Examples of Audio Out Memory DMA Formats
511
Definition of Serial Frame Bit Positions (PO-
LARITY = 1, CLOCK_EDGE = 0)
Audio In Block Diagram
Audio In Clock System and I/O Interface
Audio In Serial Frame and Bit Position Defini-
tion (POLARITY = 1, CLOCK_EDGE = 0,
EARLYMODE = 0)
Serial Format of a IEC-60958 Block
Bi-Phase Mark Data Transmission
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514
Rev. 4.0 — 03 December 2007
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. 470
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PNX15xx/952x Series
Resource Layer and ID
2-Layer 1 Resource Elements Scenario
Pool and Aperture Reassignments
Video Frame Screen Timing
Source and Target Window Parameters
Acquisition Window Counter Reference
Field Identifier Timing
Double Buffer Mode
Auxiliary Data Flow
ANC Data Structure
ANC Masked ID Checking
Double Buffer Major States
Signal Edge Definition
Back-to-back Message Passing Example
Double Buffer Major States
Buffer Sync Actions
Signal Edge Definition
Back-to-back Message Passing Example
Serial Frame (64 Bits) of a 18-Bit Precision I
D/A Converter
Example Codec Frame Layout for a Crystal
Semiconductor CS4218
Audio Out Clock System and I/O Interface
Audio In Serial Frame and Bit Position Defini-
tion (POLARITY = 1, CLOCK_EDGE = 0,
EARLYMODE = 1)
Serial Frame of the SAA7366 18-Bit I2S A/D
Converter (Format 2 SWS)
Audio In Memory DMA Formats
Suggested External SPDIF Output Interface
Circuitry
553
Connected Media Processor
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© NXP B.V. 2007. All rights reserved.
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