PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 233

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
Figure 12: Isolation Translation Logic
DATA_DIR- AD8
XIO_SEL[1] - IDE_ENABLE
10K
VCC
SYS_RSTN_OUT
PCI AD[23:16]
PCI AD[31:24]
Data Transfer Operation
In PIO mode, data transfer to/from disk is done using read/write operations of the
command and control block registers. PI/PO protocol is explained in the ATA-2
specification.
All command block registers can be programmed using direct or indirect access in the
XIO block. All disk registers are programmed. When the disk is ready to transfer data,
DMA is enabled.
AD13
AD15
AD14
AD12
AD11
AD10
AD9
AD0
Rev. 4.0 — 03 December 2007
A1[7]
A2[7]
A1[0]
A2[0]
74LS16245
Buffer
Dir1/2
OE_n1/2
OE1/2
74LS244
B2[0]
B1[0]
B1[7]
B2[7]
DD[7:0]
DD[15:8]
VCC
1K
RESET_n
Note the 10 K pullup required for INTREQ,
XIO_SEL and the 1.0 K pullup required for
DIOW-, DIOR- and IORDY.
INTREQ
VCC
1K
PNX15xx/952x Series
VCC
1K
VCC
Chapter 7: PCI-XIO Module
1K
VCC
GPIO
1K
© NXP B.V. 2007. All rights reserved.
CS1
CS0
DA2
DA1
DA0
DIOW-
DIOR-
IORDY
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