PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 435

PNX1500E

Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PNX1500E

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Table 4: Relationship Between Input Formats and Video Data Capture
PNX15XX_PNX952X_SER_N_4
Product data sheet
Input Modes
D1
VMI
HD
Figure 7:
Test Pattern Generator
Video Input
Video Data Flow
UYVY(8/10)
UYVY(8)
or UV(8/10)
2.5.1 Video Data Flow
2.5.2 Video Data Acquisition
2.5 Video Data Path
8-bit
10-bit
8-bit
8-bit
10-bit
Y(8/10)
Down_sample
The relation between the video input formats and the supported data stream is shown
in
The video datapath dataflow for the VIP is shown in
The Video and Auxiliary Data Extract block, shown in
pixel stream from the Video Timing Control block and outputs active window data and
synchronization signals. Bit fields in the windowing registers specify the start and end
of the source windows relative to the reference edges of H and V syncs and size of
the target windows.
Chroma
Table
Video Timing
Control and
Video
Extraction
4.
Single Stream (YUV) Video Data
X
X
X
U or UV or G
Y
V
(8)
(8)
(8)
(8/10)
(8/10)
Rev. 4.0 — 03 December 2007
UV
Y
or R
or B
-Ordered dither
or Rounding
(10->9)
(10->8)
propagation
(8->3,4,5,6)
Dither
(9->8)
Dither
-Error
(8)
(8)
UV
U or UV or G
V
Y
(8)
Y
(8)
(8)
Up_sample
( 8/5/4)
(8/6/5/4)
(8/5/4/3)
Chroma
or R
or B
Dual Stream (Y and U/V) Video Data
X
X
Chapter 12: Video Input Processor
PNX15xx/952x Series
(8)
U
(8)
(8)
Y
V
Packing
Pixel
See Table 10.
Figure
Figure
Color Space
Horizontal
Filtering or
Conversion
7.
(64)
(64)
(64)
1, receives a continuous
DMA2
DMA3
DMA1
U or G
Y or R
© NXP B.V. 2007. All rights reserved.
V or B
(8)
(8)
(8)
12-435

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