PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 373

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
2.7.5 Output Interface Modes
The main purpose of gamma correction is to adapt the gamma prescribed by the
transmission standard to a particular display device. Gamma may also be adapted to
ambient light conditions (a lower gamma for a brighter environment). Gamma
correction should be done on RGB signals going to the display, but never on a YUV
signal.
The gamma correction in QVCP is based on linear interpolation.The input signal is
divided into 64 segments of 16 values each. For each component, there are 2
independent look-up tables, one for the base and the other for the slope. For a strong
correction, there is an optional squarer after the linear interpolator, which is
recommended to be switched on when the gamma value is larger than about 1.4. The
output of the gamma corrector is a 14b unsigned value.
QVCP supports four output data formats: 6 bits, 8 bits, 9+1 bits, and 10 bits. They are
generated by the dither unit. The dither unit uses an error-propagation algorithm,
which minimize the average error caused by losing bits.
The supported output interface modes are described below. Note that
System On Chip Resources
PNX15xx/952x Series pins.
30-, 24- or 18-Bit Parallel Mode
All video data pins are used to transport the digital video data stream without any
component multiplexing. The output data format can be either YUV or RGB and 10-,
8-, or 6-bit (as determined by the noise shaping) per color component.
30-bit Mode:
QVCP_DATA[29:20]: Y[9:0] or R[9:0]
QVCP_DATA[19:10]: U[9:0] or G[9:0]
QVCP_DATA[9:0]: V[9:0] or B[9:0]
24-bit Mode:
QVCP_DATA[29:22]: Y[7:0] or R[7:0]
QVCP_DATA[19:12]: U[7:0] or G[7:0]
QVCP_DATA[9:2]: V[7:0] or B[7:0]
18-bit Mode:
QVCP_DATA[29:24]: Y[5:0] or R[5:0]
QVCP_DATA[19:14]: U[5:0] or G[5:0]
QVCP_DATA[9:4]: V[5:0] or B[5:0]
D1 Mode
10-bit Mode:
Rev. 4.0 — 03 December 2007
presents how the QVCP module pins are mapped to the
PNX15xx/952x Series
Chapter 11: QVCP
© NXP B.V. 2007. All rights reserved.
Chapter 3
11-373