PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 166

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
Figure 5:
stretcher count
turn_off_ack
turn_off
clk_out
clk_tm
Clock Stretcher
3
2.7 Clock Frequency Determination
A write with a 0 value stops the clock stretching circuit.
This feature allows the measuring of the internal PLL’s and DDS’s. This is used for
basic test mode only. The enable bits of the CLK_FREQ_CTL choose which of the 12
clocks to test (PLL0 - PLL2, DDS2 - DDS8). The count bits choose a count that is
based on the Xtal clock. While the counting proceeds another counter counts the
number of clocks of the chosen clock. When the xtal count ends the done bit in the
CLK_FREQ_CTL will be set. At this point the CLK_COUNT_RESULTS register can
be read. Knowing the pre-programmed value of xtal clocks and the number of clocks
of the chosen clock then the frequency of the chosen clock can be determined.
Example:
Program the CLK_FREQ_CTL register for a count of 0x7F. The
CLK_COUNT_RESULTS register is read after seeing the DONE bit in the
CLK_FREQ_CTL set. The value is 0x24B.
if xtal is 27 MHz (37ns) then the total period of count time is
So 0x24B clocks were counted in 4699 ns. Therefore the period of the measured
clock is:
which is approximately 125 MHz. A simpler formula is:
where:
CountResult is the value read from the CLK_COUNT_RESULTS register,
Programmed is the value programmed in the CLK_FREQ_CTL register and
XtalPeriod is the period in ns of the input crystal clock.
Frequency
---------------- -
0x24B
0
4699
=
8.01ns
=
3
-------------------------------------------------------------------- -
XtalPeriod Programmed
clk_out blocked
Rev. 4.0 — 03 December 2007
CountResult
2
1
0
PNX15xx/952x Series
Chapter 5: The Clock Module
3
clk_out blocked
0x7F 37
2
© NXP B.V. 2007. All rights reserved.
=
4699ns
5-166