PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 619

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
2.2.10 Destination State
2.2.11 Address Stepper
2.2.4 Rotator
2.2.5 Source FIFO
2.2.6 Pattern FIFO
2.2.7 Destination FIFO
2.2.8 Write Datapath
2.2.9 Source State
This module aligns source data to the destination.
This structure can hold up to 256 bytes of source data. Source data may be provided
from either frame buffer memory or the host processor via the MMIO bus. Data in this
FIFO will always be aligned to the destination. The output of this FIFO is used as the
source operand for ROPs and is also used when transparency is dependent on the
source.
This structure can hold up to 256 bytes of pattern data. Pattern data is always locked
to screen position and therefore never needs to be aligned. This FIFO can hold one 8
X 8 pattern in true color, 2 patterns in high color, and 4 patterns in pseudo-color
mode. This FIFO will contain the foreground color value if solid patterns are enabled.
The output of this FIFO is used as the pattern operand for ROPs. Transparency on
patterns is not allowed.
This structure can hold up to 256 bytes of destination data. Destination data is
required when a ROP requires the contents of the frame buffer to be combined with
source data, pattern data, or both. Destination data is by definition always aligned
and therefore does not need to be rotated. The output of this FIFO is used as the
destination operand for ROPs and is also used when transparency is dependent on
the destination.
The write datapath includes the ROP, Alpha Blending, and color compare functions.
The output of this block is the 64-bit data to be sent to the memory.
This block maintains the current state of the source address while the address
stepper is processing the destination address.
This block maintains the current state of the destination address while the address
stepper is processing the source address. It also may maintain DST reads while DST
writes are occurring, or vice versa.
This block is responsible for the calculation of the addresses required for a given
operation. The output of this block provides the address to the MTC and provides
byte masking information to the byte mask block.
Rev. 4.0 — 03 December 2007
PNX15xx/952x Series
Chapter 20: 2D Drawing Engine
© NXP B.V. 2007. All rights reserved.
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