PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 291
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PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
Specifications of PNX1500E
Lead Free Status / Rohs Status
Not Compliant
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Table 7: GPIO Mode Control Registers
PNX15XX_PNX952X_SER_N_4
Product data sheet
Offset 0x10,4008
31:30
29:28
27:26
25:24
23:22
21:20
19:18
17:16
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
Offset 0x10,400C
31:26
25:24
23:22
21:20
19:18
17:16
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
Bit
Symbol
MC for GPIO number 47 R/W
MC for GPIO number 46 R/W
MC for GPIO number 45 R/W
MC for GPIO number 44 R/W
MC for GPIO number 43 R/W
MC for GPIO number 42 R/W
MC for GPIO number 41 R/W
MC for GPIO number 40 R/W
MC for GPIO number 39 R/W
MC for GPIO number 38 R/W
MC for GPIO number 37 R/W
MC for GPIO number 36 R/W
MC for GPIO number 35 R/W
MC for GPIO number 34 R/W
MC for GPIO number 33 R/W
MC for GPIO number 32 R/W
Unused
MC for GPIO number 60 R/W
MC for GPIO number 59 R/W
MC for GPIO number 58 R/W
MC for GPIO number 57 R/W
MC for GPIO number 56 R/W
MC for GPIO number 55 R/W
MC for GPIO number 54 R/W
MC for GPIO number 53 R/W
MC for GPIO number 52 R/W
MC for GPIO number 51 R/W
MC for GPIO number 50 R/W
MC for GPIO number 49 R/W
MC for GPIO number 48 R/W
Mode Control for GPIO pins 47—32
Mode Control for GPIO pins 60—48
Acces
s
Value
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
0b11
Rev. 4.0 — 03 December 2007
Description
The Mode Control (MC) bit pairs control the mode of the
corresponding GPIO pin. The number portion of MCxx identifies the
GPIO number. Refer to
The following values apply to writing to all of the bit pairs:
The Mode Control (MC) bit pairs control the mode of the
corresponding GPIO pin. The number portion of MCxx identifies the
GPIO number. Refer to
The following values apply to writing to all of the bit pairs:
• 00 - retain current GPIO Mode of operation (will not overwrite
• 01 - place Pin in primary function mode
• 10 - place Pin in GPIO function mode
• 11 - place Pin in GPIO function with Open-Drain Output mode
• 00 - retain current GPIO Mode of operation (will not overwrite
• 01 - place Pin in primary function mode (see MUX table)
• 10 - place Pin in GPIO function mode (see MUX table)
• 11 - place Pin in GPIO function with Open-Drain Output mode
current mode). Not readable
current mode). Not readable
Chapter 8: General Purpose Input Output Pins
Table 1 on page
Table 1 on page
PNX15xx/952x Series
8-269.
8-269.
© NXP B.V. 2007. All rights reserved.
8-291
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