HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 73

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
3.1
The SH7050 series has five operating modes that are selected by pins MD3 to MD0 and FWE. The
mode setting pins should not be changed during operation of the SH7050 series, and only the
setting combinations shown in table 3.1 should be used.
Table 3.1
Note:
There are two normal operating modes: single-chip mode and expanded mode.
Modes in which the flash memory can be programmed are boot mode and user program mode (the
two on-board programming modes) and writer mode in which programming is performed with an
EPROM programmer (a type which supports programming of this device).
For details, see the sections on ROM.
Operating
Mode No. FWE MD3 MD2 MD1 MD0
Mode 0
Mode 1
Mode 2
Mode 3
Mode 16
Mode 17
Mode 18
Mode 19
Mode 13
* Pins MD3 and MD2 set the clock operating mode. For details of the clock mode
Operating Mode Selection
settings, see section 4.2, Clock Operating Modes.
0
0
0
0
1
1
1
1
0/1
Operating Mode Selection
1
*
Pin Settings
Section 3 Operating Modes
1
*
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
1
Mode Name
MCU expanded mode
MCU single-chip mode
Boot mode
User program mode
Writer mode
Rev. 5.00 Jan 06, 2006 page 51 of 818
Section 3 Operating Modes
On-Chip
ROM
Disabled
Enabled
Enabled
Enabled
Enabled
REJ09B0273-0500
Area 0
Bus Width
8 bits
16 bits
Set by BCR1
Set by BCR1
Set by BCR1

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