HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 460

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 14 A/D Converter
Table 14.3 Analog Input Channels and A/D Data Registers
Analog
Input
Channel
AN0
AN1
AN2
AN3
14.2.2
A/D control/status register 0 (ADCSR0) is an 8-bit readable/writable register whose functions
include selection of the A/D conversion mode for A/D0.
ADCSR0 is initialized to H'00 by a power-on reset, and in hardware standby mode and software
standby mode.
Note:
Bit 7—A/D End Flag (ADF): Indicates the end of A/D conversion.
Bit 7:
ADF
0
1
Rev. 5.00 Jan 06, 2006 page 438 of 818
REJ09B0273-0500
Initial value:
* Only 0 can be written, to clear the flag.
A/D Control/Status Register 0 (ADCSR0)
A/D Data
Register
ADDR0
ADDR1
ADDR2
ADDR3
Description
Indicates that A/D0 is performing A/D conversion, or is in the idle state.
[Clearing conditions]
Indicates that A/D0 has finished A/D conversion, and the digital value has been
transferred to ADDR.
[Setting conditions]
R/W:
Bit:
When ADF is read while set to 1, then 0 is written in ADF
When the DMAC is activated by ADI0
Single mode: When A/D conversion ends
Scan mode: When all A/D conversions end within one selected analog group
R/(W) *
ADF
7
0
Analog
Input
Channel
AN4
AN5
AN6
AN7
ADIE
R/W
6
0
A/D Data
Register
ADDR4
ADDR5
ADDR6
ADDR7
ADM1
R/W
5
0
AN8
AN9
AN10
AN11
Analog
Input
Channel
ADM0
R/W
4
0
CH3
R/W
A/D Data
Register
ADDR8
ADDR9
ADDR10
ADDR11
3
0
CH2
R/W
2
0
Analog
Input
Channel
AN12
AN13
AN14
AN15
CH1
R/W
1
0
(Initial value)
A/D Data
Register
ADDR12
ADDR13
ADDR14
ADDR15
CH0
R/W
0
0