HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 358

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 10 Advanced Timer Unit (ATU)
Halting of a Down-Counter by the CPU: A down-counter (DCNT) can be halted by writing
H'0000 to it. The CPU cannot write 0 directly to the down-count start register (DSTR); instead, by
setting DCNT to H'0000, the corresponding DSTR bit is cleared to 0 and the count is stopped.
However, the OSF bit in the timer status register (TSR) is set when DCNT underflows.
Note that when H'0000 is written to DCNT, the corresponding DSTR bit is not cleared to 0
immediately; it is cleared to 0, and the down-counter is stopped, when underflow occurs following
the H'0000 write.
The timing in this case is shown in figure 10.60
Rev. 5.00 Jan 06, 2006 page 336 of 818
REJ09B0273-0500
Internal write signal
DCNT input clock
(one-shot pulse)
Port output
Figure 10.60 Halting of a Down-Counter by the CPU
DCNT
DSTR
TSR
CK
H'0000
written
to DCNT
N
H'0000
H'0000

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