HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 724

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Appendix A On-Chip Supporting Module Registers
Timer Status Register DH
(TSRDH)
Note:
Bit
4
3
2
1
0
Rev. 5.00 Jan 06, 2006 page 702 of 818
REJ09B0273-0500
Initial value:
Bit Name
Overflow flag
(OVF3)
Input capture/
compare match flag
(IMF3D)
Input capture/
compare match flag
(IMF3C)
Input capture/
compare match flag
(IMF3B)
Input capture/
compare match flag
(IMF3A)
* Only 0 can be written to clear the flag.
Bit name:
R/W:
Bit:
—
R
7
0
Value
0
1
0
1
0
1
0
1
0
1
—
R
6
0
Description
[Clearing condition]
Read OVF3 when OVF3 =1, then write 0 in OVF3
[Setting condition]
TCNT3 overflowed from H'FFFF to H'0000
[Clearing condition]
Read IMF3D when IMF3D =1, then write 0 in IMF3D
[Setting conditions]
1. TCNT3 value is transferred to GR3D by an input capture signal
2. TCNT3 = GR3D when GR3D functions as an output compare
[Clearing condition]
Read IMF3C when IMF3C =1, then write 0 in IMF3C
[Setting conditions]
1. TCNT3 value is transferred to GR3C by an input capture signal
2. TCNT3 = GR3C when GR3C functions as an output compare
[Clearing condition]
Read IMF3B when IMF3B =1, then write 0 in IMF3B
[Setting conditions]
1. TCNT3 value is transferred to GR3B by an input capture signal
2. TCNT3 = GR3B when GR3B functions as an output compare
[Clearing condition]
Read IMF3A when IMF3A =1, then write 0 in IMF3A
[Setting conditions]
1. TCNT3 value is transferred to GR3A by an input capture signal
2. TCNT3 = GR3A when GR3A functions as an output compare
when GR3D functions as an input capture register
register
when GR3C functions as an input capture register
register
when GR3B functions as an input capture register
register
when GR3A functions as an input capture register
register
—
R
5
0
H'FFFF8203
(Channels 3 to 5)
R/(W) *
OVF3
4
0
R/(W) *
IMF3D
3
0
R/(W) *
IMF3C
2
0
8
R/(W) *
IMF3B
1
0
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)
R/(W) *
IMF3A
ATU
0
0