HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 269

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 3—Input Capture/Compare-Match Flag (IMF4A): Status flag that indicates GR4A input
capture or compare-match.
Bit 2—Overflow Flag (OVF5): Status flag that indicates TCNT5 overflow.
Bit 1—Input Capture/Compare-Match Flag (IMF5B): Status flag that indicates GR5B input
capture or compare-match.
Bit 3:
IMF4A
0
1
Bit 2:
OVF5
0
1
Bit 1:
IMF5B
0
1
Description
[Clearing condition]
When IMF4A is read while set to 1, then 0 is written in IMF4A
[Setting conditions]
Description
[Clearing condition]
When OVF5 is read while set to 1, then 0 is written in OVF5
[Setting condition]
When the TCNT5 value overflows (from H'FFFF to H'0000)
Description
[Clearing condition]
When IMF5B is read while set to 1, then 0 is written in IMF5B
[Setting conditions]
When the TCNT4 value is transferred to GR4A by an input capture signal while
GR4A is functioning as an input capture register
When TCNT4 = GR4A while GR4A is functioning as an output compare register
When the TCNT5 value is transferred to GR5B by an input capture signal while
GR5B is functioning as an input capture register
When TCNT5 = GR5B while GR5B is functioning as an output compare register
Rev. 5.00 Jan 06, 2006 page 247 of 818
Section 10 Advanced Timer Unit (ATU)
REJ09B0273-0500
(Initial value)
(Initial value)
(Initial value)