HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 261

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 0—Input Capture Flag (ICF0A): Status flag that indicates ICR0A input capture.
Timer Status Register B (TSRB)
TSRB indicates the status of channel 1 input capture, compare-match, and overflow.
Note:
Bit 7—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 6—Overflow Flag (OVF1): Status flag that indicates TCNT1 overflow.
Bit 0:
ICF0A
0
1
Bit 6:
OVF1
0
1
Initial value:
* Only 0 can be written, to clear the flag.
Description
[Clearing condition]
When ICF0A is read while set to 1, then 0 is written in ICF0A
[Setting condition]
When the TCNT0 value is transferred to the input capture register (ICR0A) by an input
capture signal
Description
[Clearing condition])
When OVF1 is read while set to 1, then 0 is written in OVF1
[Setting condition]
When the TCNT1 value overflows (from H'FFFF to H'0000)
R/W:
Bit:
—
R
7
0
R/(W) *
OVF1
6
0
R/(W) *
IMF1F
5
0
R/(W) *
IMF1E
4
0
Rev. 5.00 Jan 06, 2006 page 239 of 818
Section 10 Advanced Timer Unit (ATU)
R/(W) *
IMF1D
3
0
R/(W) *
IMF1C
2
0
REJ09B0273-0500
R/(W) *
IMF1B
1
0
(Initial value)
(Initial value)
R/(W) *
IMF1A
0
0