HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 134

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 8 Bus State Controller (BSC)
Table 8.2
Name
Bus control register 1
Bus control register 2
Wait state control register 1
Wait state control register 2
RAM emulation register
Notes: 1. When using a longword access to write to RAMER , always write 0 in the lower word
8.1.5
Figure 8.2 shows the address format used by the SH7050 series.
This LSI uses 32-bit addresses:
Rev. 5.00 Jan 06, 2006 page 112 of 818
REJ09B0273-0500
A31 to A24 are used to select the type of space and are not output externally.
Bits A23 and A22 are decoded and output as chip select signals (CS0 to CS3) for the
corresponding areas when bits A31 to A24 are 00000000.
A21 to A0 are output externally.
2. In register access, three cycles are required for byte access and word access, and six
Address Map
A31–A24
(address H'FFFF8630). Operation cannot be guaranteed if a non-zero value is written.
cycles for longword access.
Register Configuration
Space selection:
Not output externally; used to select the type of space
On-chip ROM space or CS0 to CS3 space when 00000000 (H'00)
DRAM space when 00000001 (H'01)
Reserved (do not access) when 00000010 to 11111110 (H'01 to H'FE)
On-chip peripheral module space or on-chip RAM space when 11111111 (H'FF)
A23, A22
Abbr.
BCR1
BCR2
WCR1
WCR2
RAMER
CS space selection:
Decoded, outputs CS0 to CS3 when A31 to A24 = 00000000
Figure 8.2 Address Format
A21
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
H'000F
H'FFFF
H'FFFF
H'000F
H'0000
Output address:
Output from the address pins
Address
H'FFFF8620
H'FFFF8622
H'FFFF8624
H'FFFF8626
H'FFFF8628
Access Size
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
A0