HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 357

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Contention between Interrupt Status Flag Clearing by DMAC and Setting by Input
Capture/Compare-Match: If a clear request signal is generated by the DMAC when the interrupt
status flag (ICF0B, CMF6) is set by input capture (ICR0B) or compare-match (CYLR6), clearing
by the DMAC has priority and the interrupt status flag is not set.
The width of the DMAC clear request signal is normally two states, the same as an ATU access
cycle, and clearing is performed in two states. If a bus wait, or a bus request from off-chip, occurs
while the DMAC clear request signal is being output, the DMAC clear request signal width will be
N states (N
The timing in this case is shown in figure 10.59
Figure 10.59 Contention between Interrupt Status Flag Clearing by DMAC and Setting by
a. When the input capture/compare-match signal precedes the interrupt status flag
b. When the input capture/compare-match signal follows the interrupt status flag
3).
compare-match signal
clear signal by 1/2 state
clear signal by 1/2 state, and contention arises
compare-match signal
DMAC clear request
DMAC clear request
Interrupt status flag
Interrupt status flag
Interrupt status flag
Interrupt status flag
Input capture/
ICF0B, CMF6
Input capture/
ICF0B, CMF6
clear signal
clear signal
signal
signal
Input Capture/Compare-Match
CK
CK
1/2 state
Rev. 5.00 Jan 06, 2006 page 335 of 818
Section 10 Advanced Timer Unit (ATU)
REJ09B0273-0500

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