HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 484

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 15 Compare Match Timer (CMT)
15.2
15.2.1
The compare match timer start register (CMSTR) is a 16-bit register that selects whether to
operate or halt the channel 0 and channel 1 counters (CMCNT). It is initialized to H'0000 by a
power-on reset and in standby modes.
Bits 15–2—Reserved: These bits always read as 0. The write value should always be 0.
Bit 1—Count Start 1 (STR1): Selects whether to operate or halt compare match timer counter 1.
Bit 1: STR1
0
1
Bit 0—Count Start 0 (STR0): Selects whether to operate or halt compare match timer counter 0.
Bit 0: STR0
0
1
Rev. 5.00 Jan 06, 2006 page 462 of 818
REJ09B0273-0500
Initial value:
Initial value:
Register Descriptions
Compare Match Timer Start Register (CMSTR)
R/W:
R/W:
Bit:
Bit:
15
—
—
R
R
0
7
0
Description
CMCNT1 count operation halted (initial value)
CMCNT1 count operation
Description
CMCNT0 count operation halted (initial value)
CMCNT0 count operation
14
—
—
R
R
0
6
0
13
—
—
R
R
0
5
0
12
—
—
R
R
0
4
0
11
—
—
R
R
0
3
0
10
—
—
R
R
0
2
0
STR1
R/W
—
R
9
0
1
0
STR0
R/W
—
R
8
0
0
0