HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 381

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 5—Timer Enable (TME): Enables or disables the timer.
Bits 4 and 3—Reserved: These bits always read as 1. The write value should always be 1.
Bits 2 to 0: Clock Select 2 to 0 (CKS2 to CKS0): These bits select one of eight internal clock
sources for input to the TCNT. The clock signals are obtained by dividing the frequency of the
system clock ( ).
Note:
Bit 5: TME
0
1
Bit 2: CKS2 Bit 1: CKS1
0
0
0
0
1
1
1
1
* The overflow interval listed is the time from when the TCNT begins counting at H'00
until an overflow occurs.
0
0
1
1
0
0
1
1
Description
Timer disabled: TCNT is initialized to H'00 and count-up stops (initial
value)
Timer enabled: TCNT starts counting. A WDTOVF signal or interrupt is
generated when TCNT overflows.
Bit 0: CKS0
0
1
0
1
0
1
0
1
Clock Source
/2 (initial value)
/64
/128
/256
/512
/1024
/4096
/8192
Rev. 5.00 Jan 06, 2006 page 359 of 818
Section 12 Watchdog Timer (WDT)
Description
Overflow Interval *
( = 20 MHz)
25.6 µs
819.2 µs
1.6 ms
3.3 ms
6.6 ms
13.1 ms
52.4 ms
104.9 ms
REJ09B0273-0500