HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 371

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
11.3
11.3.1
APC pulse output is enabled by designating multiplex pins for APC pulse output with the pin
function controller (PFC), and setting the corresponding bits to 1 in the pulse output port control
register (POPCR).
When general register 2A (GR2A) in the advanced timer unit (ATU) subsequently generates a
compare-match signal, 1 is output from the pins set to 1 by bits 7 to 0 in POPCR. When general
register 2B (GR2B) generates a compare-match signal, 0 is output from the pins set to 1 by bits 15
to 8 in POPCR.
0 is output from the output-enabled state until the first compare-match occurs.
The advanced pulse controller output operation is shown in figure 11.2.
(PULS0 to PULS7)
APC output pins
Operation
Overview
Figure 11.2 Advanced Pulse Controller Output Operation
Port function
selection
CR
Upper 8 bits
Lower 8 bits
of POPCR
of POPCR
Reset signal
Set signal
Section 11 Advanced Pulse Controller (APC)
Rev. 5.00 Jan 06, 2006 page 349 of 818
Compare-match
signal
Compare-match
signal
REJ09B0273-0500
GR2B
GR2A

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