HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 669

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
21.4
21.4.1
To enter the standby mode, set the SBY bit to 1 in SBYCR, then execute the SLEEP instruction.
The LSI moves from the program execution state to the standby mode. In the standby mode,
power consumption is greatly reduced by halting not only the CPU, but the clock and on-chip
peripheral modules as well. CPU register contents and on-chip RAM data are held as long as the
prescribed voltages are applied (when the RAME bit in SYSCR is 0). The register contents of
some on-chip peripheral modules are initialized, but some are not (table 21.4). The I/O port status
can be selected as held or high impedance by the port high impedance bit (HIZ) of the SBYCR.
For pin status other than for the I/O port, refer to Appendix B, Pin States.
Oscillator
HSTBY
RES
Transition to Software Standby Mode
Software Standby Mode
Figure 21.1 Hardware Standby Mode Timing
RES pulse
width t
RESW
Rev. 5.00 Jan 06, 2006 page 647 of 818
Section 21 Power-Down State
Oscillation
stabilization
time
REJ09B0273-0500
Reset
exception
handling

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