HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 632

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 ROM (256 kB Version)
19.7
A software method, using the CPU, is employed to program and erase flash memory in the on-
board programming modes. There are four flash memory operating modes: program mode, erase
mode, program-verify mode, and erase-verify mode. Transitions to these modes are made by
setting the PSU1, ESU1, P1, E1, PV1, and EV1 bits in FLMCR1 for addresses H'00000 to
H'1FFFF, or the PSU2, ESU2, P2, E2, PV2, and EV2 bits in FLMCR2 for addresses H'20000 to
H'3FFFF.
The flash memory cannot be read while being programmed or erased. Therefore, the program
(programming control program) that controls flash memory programming/erasing should be
located and executed in on-chip RAM or external memory.
Notes: 1. Operation is not guaranteed if setting/resetting of the SWE, ESU1, PSU1, EV1, PV1,
19.7.1
When writing data or programs to flash memory, the program/program-verify flowchart shown in
figure 19.7 should be followed. Performing program operations according to this flowchart will
enable data or programs to be written to flash memory without subjecting the device to voltage
stress or sacrificing program data reliability. Programming should be carried out 32 bytes at a
time.
Following the elapse of 10 µs or more after the SWE bit is set to 1 in flash memory control
register 1 (FLMCR1), 32-byte program data is stored in the program data area and reprogram data
area, and the 32-byte data in the program data area in RAM is written consecutively to the
program address (the lower 8 bits of the first address written to must be H'00, H'20, H'40, H'60,
H'80, H'A0, H'C0, or H'E0). Thirty-two consecutive byte data transfers are performed. The
program address and program data are latched in the flash memory. A 32-byte data transfer must
be performed even if writing fewer than 32 bytes; in this case, H'FF data must be written to the
extra addresses.
Rev. 5.00 Jan 06, 2006 page 610 of 818
REJ09B0273-0500
2. When programming or erasing, set FWE to 1 (programming/erasing will not be
3. Programming should be performed in the erased state. Do not perform additional
4. Do not program addresses H'00000 to H'1FFFF and H'20000 to H'3FFFF
Programming/Erasing Flash Memory
Program Mode (n = 1 for Addresses H'0000 to H'1FFFF, n = 2 for Addresses
H'20000 to H'3FFFF)
E1, and P1 bits in FLMCR1, or the ESU2, PSU2, EV2, PV2, E2, and P2 bits in
FLMCR2, is executed by a program in flash memory.
executed if FWE = 0).
programming on previously programmed addresses.
simultaneously. Operation is not guaranteed if this is done.