HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 131

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
8.1
The bus state controller (BSC) divides up the address spaces and outputs control for various types
of memory. This enables memories like SRAM, and ROM to be linked directly to the LSI without
external circuitry.
8.1.1
The BSC has the following features:
Address space is divided into four spaces
On-chip ROM and RAM interfaces
A maximum linear 2 Mbytes for on-chip ROM effective mode, and a maximum linear
4-Mbyte for on-chip ROM ineffective mode for address space CS0
A maximum linear 4 Mbytes for each of the address spaces CS1–CS3
Bus width can be selected for each space (8 or 16 bits)
Wait states can be inserted by software for each space
Wait state insertion with WAIT pin in external memory space access
Outputs control signals for each space according to the type of memory connected
On-chip RAM access of 32 bits in 1 state
Features
Overview
Section 8 Bus State Controller (BSC)
Rev. 5.00 Jan 06, 2006 page 109 of 818
Section 8 Bus State Controller (BSC)
REJ09B0273-0500

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