AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 644

• Manufacturer Part Number: AT91SAM9G10-EK
• Description: KIT DEV FOR SAM9G10 ARM
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT91SAM9G10-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Kit Contents: Board
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: AT91SAM9G10, ARM926EJ-S
• Tool / Board Applications: Microcontroller
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 38-5. TFT Panel Timing (Line Expanded View), CLKMOD=1
644
LCDVSYNC
LCDHSYNC
LCDDEN
LCDDOTCK
AT91SAM9G10
LCDD
VHDLY+1
--------------------------- -
f
LCDVSYNC
Usually the LCD_FRM rate is about 70 Hz to 75 Hz. It is given by the following equation:
where:
In STN Mode:
In monochrome mode, Horizontal_display_size is equal to the number of horizontal pixels. The
number_data_lines is equal to the number of bits of the interface in single scan mode;
number_data_lines is equal to half the bits of the interface in dual scan mode.
In color mode, Horizontal_display_size equals three times the number of horizontal pixels.
In TFT Mode:
The frame rate equation is used first without considering the clock periods added at the end
beginning or at the end of each line to determine, approximately, the LCDDOTCK rate:
With this value, the CLKVAL is fixed, as well as the corresponding LCDDOTCK rate.
Then select VHDLY, HPW and HBP according to the type of LCD used and
page
1
• HOZVAL determines de number of LCDDOTCK cycles per line
• LINEVAL determines the number of LCDHSYNC cycles per frame, according to the
HPW+1
expressions shown below:
642.
=
⎛
⎝
VHDLY
-------------------------------------------------------------------------------------------------------------------- -
HBP+1
f
HOZVAL
LINEVAL
HOZVAL
LINEVAL
lcd_pclk
+
HPW
1 PCLK
=
=
=
=
=
(
HOZVAL
Horizontal_display_size
-------------------------------------------------------------- - 1
Horizontal_display_size 1
+
Vertical_display_size 1
Vertical_display_size 1
Line Period
f
HBP
LCDDOTCK
Number_data_lines
+
1/2 PCLK 1/2 PCLK
+
HOZVAL
5
)
×
(
f
lcd_vsync
+
HFP
HOZVAL+1
–
–
–
–
×
+
5
(
LINEVAL
⎞ VBP
⎠
(
+
LINEVAL
+
1
)
)
+
6462A–ATARM–03-Jun-09
VFP
“Equation 1” on
HFP+1
+
1
)