AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 496

KIT DEV FOR SAM9G10 ARM

AT91SAM9G10-EK

Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT91SAM9G10-EK

Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
33.8.3
Name:
Addresses:
Access:
• CKS: Receive Clock Selection
• CKO: Receive Clock Output Mode Selection
• CKI: Receive Clock Inversion
0 = The data inputs (Data and Frame Sync signals) are sampled on Receive Clock falling edge. The Frame Sync signal
output is shifted out on Receive Clock rising edge.
1 = The data inputs (Data and Frame Sync signals) are sampled on Receive Clock rising edge. The Frame Sync signal out-
put is shifted out on Receive Clock falling edge.
CKI affects only the Receive Clock and not the output clock signal.
6462A–ATARM–03-Jun-09
0x3-0x7
31
23
15
7
CKO
CKS
0x0
0x1
0x2
0x0
0x1
0x2
0x3
SSC Receive Clock Mode Register
CKG
Receive Clock Output Mode
None
Continuous Receive Clock
Receive Clock only during data transfers
Reserved
Selected Receive Clock
Divided Clock
TK Clock signal
RK pin
Reserved
30
22
14
SSC_RCMR
0xFFFBC010 (0), 0xFFFC0010 (1), 0xFFFC4010 (2)
Read-write
6
CKI
29
21
13
5
STOP
28
20
12
4
PERIOD
STTDLY
CKO
27
19
11
3
26
18
10
2
START
AT91SAM9G10
25
17
9
1
Input-only
CKS
RK pin
Output
Output
24
16
8
0
496

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