AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 568

KIT DEV FOR SAM9G10 ARM

AT91SAM9G10-EK

Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT91SAM9G10-EK

Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
35.9.3
Name:
Address:
Access Type:
• DTOCYC: Data Timeout Cycle Number
Defines a number of Master Clock cycles with DTOMUL.
• DTOMUL: Data Timeout Multiplier
These fields determine the maximum number of Master Clock cycles that the MCI waits between two data block transfers.
It equals (DTOCYC x Multiplier).
Multiplier is defined by DTOMUL as shown in the following table:
If the data time-out set by DTOCYC and DTOMUL has been exceeded, the Data Time-out Error flag (DTOE) in the MCI
Status Register (MCI_SR) raises.
6462A–ATARM–03-Jun-09
0
0
0
0
1
1
1
1
31
23
15
7
MCI Data Timeout Register
DTOMUL
0
0
1
1
0
0
1
1
30
22
14
MCI_DTOR
0xFFFA8008
Read/write
6
0
1
0
1
0
1
0
1
DTOMUL
Multiplier
1
16
128
256
1024
4096
65536
1048576
29
21
13
5
28
20
12
4
27
19
11
3
26
18
10
2
DTOCYC
AT91SAM9G10
25
17
9
1
24
16
8
0
568

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