AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 365
AT91SAM9G10-EK
Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Specifications of AT91SAM9G10-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 365 of 730
- Download datasheet (12Mb)
If PCSDEC = 1:
• DLYBCS: Delay Between Chip Selects
This field defines the delay from NPCS inactive to the activation of another NPCS. The DLYBCS time guarantees non-over-
lapping chip selects and solves bus contentions in case of peripherals having long data float times.
If DLYBCS is less than or equal to six, six MCK periods will be inserted by default.
Otherwise, the following equation determines the delay:
6462A–ATARM–03-Jun-09
PCS = xx01
PCS = x011
PCS = 0111
PCS = 1111
(x = don’t care)
NPCS[3:0] output signals = PCS.
NPCS[3:0] = 1101
NPCS[3:0] = 1011
NPCS[3:0] = 0111
forbidden (no peripheral is selected)
Delay Between Chip Selects
=
DLYBCS
---------------------- -
MCK
AT91SAM9G10
365
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