AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 384

KIT DEV FOR SAM9G10 ARM

AT91SAM9G10-EK

Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT91SAM9G10-EK

Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
31.7.7
Figure 31-14. SMBUS Quick Command
31.7.8
384
AT91SAM9G10
SMBUS Quick Command (Master Mode Only)
Read-write Flowcharts
The TWI interface can perform a Quick Command:
The following flowcharts shown in
31-18 on page
read and write operations. A polling or interrupt method can be used to check the status bits.
The interrupt method requires that the interrupt enable register (TWI_IER) be configured first.
1. Configure the master mode (DADR, CKDIV, etc.).
2. Write the MREAD bit in the TWI_MMR register at the value of the one-bit command to
3. Start the transfer by setting the QUICK bit in the TWI_CR.
be sent.
TXCOMP
Write QUICK command in TWI_CR
TXRDY
388,
TWD
Figure 31-19 on page 389
S
DADR
Figure 31-16 on page
R/W
and
A
Figure 31-20 on page 390
P
386,
Figure 31-17 on page
6462A–ATARM–03-Jun-09
give examples for
387,
Figure

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