AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 209

KIT DEV FOR SAM9G10 ARM

AT91SAM9G10-EK

Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT91SAM9G10-EK

Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 23-5. Refresh Cycle Followed by a Read Access
23.5.5
23.5.5.1
6462A–ATARM–03-Jun-09
SDRAMC_A[12:0]
D[31:0]
SDWE
(input)
SDCS
SDCK
RAS
CAS
Power Management
Row n
Self-refresh Mode
col c col d
Dnb
Dnc
Three low-power modes are available:
The SDRAM Controller activates one low-power mode as soon as the SDRAM device is not
selected. It is possible to delay the entry in self-refresh and power-down mode after the last
access by programming a timeout value in the Low Power Register.
This mode is selected by programming the LPCB field to 1 in the SDRAMC Low Power Register.
In self-refresh mode, the SDRAM device retains data without external clocking and provides its
own internal clocking, thus performing its own auto-refresh cycles. All the inputs to the SDRAM
device become “don’t care” except SDCKE, which remains low. As soon as the SDRAM device
is selected, the SDRAM Controller provides a sequence of commands and exits self-refresh
mode.
Some low-power SDRAMs (e.g., mobile SDRAM) can refresh only one quarter or a half quarter
or all banks of the SDRAM array. This feature reduces the self-refresh current. To configure this
feature, Temperature Compensated Self Refresh (TCSR), Partial Array Self Refresh (PASR)
and Drive Strength (DS) parameters must be set in the Low Power Register and transmitted to
the low-power SDRAM during initialization.
Dnd
• Self-refresh Mode: The SDRAM executes its own Auto-refresh cycle without control of the
• Power-down Mode: Auto-refresh cycles are controlled by the SDRAM Controller. Between
• Deep Power-down Mode: (Only available with Mobile SDRAM) The SDRAM contents are
SDRAM Controller. Current drained by the SDRAM is very low.
auto-refresh cycles, the SDRAM is in power-down. Current drained in Power-down mode is
higher than in Self-refresh Mode.
lost, but the SDRAM does not drain any current.
t
RP
= 3
t
RC
= 8
Row m
AT91SAM9G10
t
RCD
= 3
col a
CAS = 2
Dma
209

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