AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 377

• Manufacturer Part Number: AT91SAM9G10-EK
• Description: KIT DEV FOR SAM9G10 ARM
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT91SAM9G10-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Kit Contents: Board
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: AT91SAM9G10, ARM926EJ-S
• Tool / Board Applications: Microcontroller
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

31.4.1
Table 31-3.
31.5
31.5.1
31.5.2
31.5.3
31.6
31.6.1
377
Pin Name
TWD
TWCK
Product Dependencies
Functional Description
AT91SAM9G10
I/O Lines Description
I/O Lines
Power Management
Interrupt
Transfer Format
I/O Lines Description
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer
must perform the following step:
The user must not program TWD and TWCK as open-drain. It is already done by the hardware.
Table 31-4.
The TWI interface may be clocked through the Power Management Controller (PMC), thus the
programmer must first configure the PMC to enable the TWI clock.
The TWI interface has an interrupt line connected to the Advanced Interrupt Controller (AIC). In
order to handle interrupts, the AIC must be programmed before configuring the TWI.
Table 31-5.
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must
be followed by an acknowledgement. The number of bytes per transfer is unlimited (see
31-4).
Each transfer begins with a START condition and terminates with a STOP condition (see
31-3).
• Program the PIO controller to dedicate TWD and TWCK as peripheral lines.
• Enable the peripheral clock.
Instance
Instance
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
TWI
TWI
TWI
I/O Lines
Peripheral IDs
11
ID
Figure 31-2 on page
Signal
TWCK
TWD
376). When the bus is free, both lines are
I/O Line
PA8
PA7
Input/Output
Input/Output
6462A–ATARM–03-Jun-09
Type
Peripheral
A
A
Figure
Figure