AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 181

• Manufacturer Part Number: AT91SAM9G10-EK
• Description: KIT DEV FOR SAM9G10 ARM
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT91SAM9G10-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Kit Contents: Board
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: AT91SAM9G10, ARM926EJ-S
• Tool / Board Applications: Microcontroller
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

22.10.2
Figure 22-22. TDF Optimization: No TDF wait states are inserted if the TDF period is over when the next access begins
22.10.3
6462A–ATARM–03-Jun-09
D[31:0]
A
NCS0
[25:2]
NWE
MCK
NRD
TDF Optimization Enabled (TDF_MODE = 1)
TDF Optimization Disabled (TDF_MODE = 0)
read access on NCS0 (NRD controlled)
When the TDF_MODE of the SMC_MODE register is set to 1 (TDF optimization is enabled), the
SMC takes advantage of the setup period of the next access to optimize the number of wait
states cycle to insert.
Figure 22-22
NWE, on Chip Select 0. Chip Select 0 has been programmed with:
NRD_HOLD = 4; READ_MODE = 1 (NRD controlled)
NWE_SETUP = 3; WRITE_MODE = 1 (NWE controlled)
TDF_CYCLES = 6; TDF_MODE = 1 (optimization enabled).
When optimization is disabled, tdf wait states are inserted at the end of the read transfer, so that
the data float period is ended when the second access begins. If the hold period of the read1
controlling signal overlaps the data float period, no additional tdf wait states will be inserted.
Figure
with no TDF optimization.
• read access followed by a read access on another chip select,
• read access followed by a write access on another chip select,
• read access followed by a write access on the same chip select,
22-23,
shows a read access controlled by NRD, followed by a write access controlled by
Figure 22-24
NRD_HOLD= 4
TDF_CYCLES = 6
and
Figure 22-25
Read to Write
Wait State
illustrate the cases:
NWE_SETUP= 3
write access on NCS0 (NWE controlled)
AT91SAM9G10
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